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hot swappable , dual i 2 c isolators ADUM1250/adum1251 rev. d information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.470 0 www.analog.com fax: 781.461.3113 ? 2006 C 2011 analog devices, inc. all rights reserved. f eatures b idirectional i 2 c c ommunication open - drain interfaces suitable for hot swap applications 30 ma current sink capability 1000 k hz o peration 3.0 v to 5.5 v supply/logic levels 8- lead soic rohs - compliant package high temperature operation: 1 2 5c qual ified for automotive applications s afety and regulatory approvals ul recognition 2500 v rms for 1 minute per ul 1577 csa c omponent a cceptance n otice #5a vde c ertificate of c onformity din v vde v 0884 - 10 (vde v 0884 - 10):2006 - 12 v iorm = 560 v peak a pplications isolated i 2 c, smb us, or pmbus i nterfaces multil evel i 2 c i nterfaces power s upplies networking power - over - ethernet hybrid electric vehicle battery management functional block dia grams encode decode decode encode encode decode decode encode v dd1 sda 1 scl 1 gnd 1 v dd2 sda 2 scl 2 gnd 2 1 2 3 4 8 7 6 5 06113-001 figure 1 . ADUM1250 encode decode encode decode decode encode v dd1 sda 1 scl 1 gnd 1 v dd2 sda 2 scl 2 gnd 2 1 2 3 4 8 7 6 5 06113-002 figure 2 . adum1251 g eneral d escription the ADUM1250/adum1251 1 are hot swap pable digital isolators with non latching , b idirectional communication channels compatible with i 2 c? interfaces. this elimi nates the need for splitting i 2 c signals into sepa rate transmit and rec eive signals for use with stand alone optocouplers. the ADUM1250 provides two b idirectional channels , supporting a complete isolated i 2 c interface. the adum1251 provides one b idirectional channel and one un i directional channel for thos e applications where a b idirectional clock is not required. both the ADUM1250 and adum1251 contain hot swap circuitry to prevent glitching d ata when an unpowered card is inserted onto an active bus. these isola tors are based on i coupler? chip scale transfo rmer technology from analog devices, inc . i coupler is a magnetic isolation technology with functional, performance, size, and power consumption advantages as compared to optocouplers. with the ADUM1250/adum1251, i coupler channels can be integrated wit h sem iconductor circuitry, which enables a complete isolated i 2 c interface to be implemented in a small form factor. 1 protected by u.s. patents 5,952,849; 6,873,065 ; and 7,075,329.
ADUM1250/adum1251 rev. d | page 2 of 12 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagrams ............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical ch aracteristics ............................................................. 3 package characteristics ............................................................... 5 regulatory information ............................................................... 5 insulation and safety - related specifications ............................ 5 din v vde v 0884 - 10 (vde v 0884 - 10) insulation characteristics .............................................................................. 6 recommended o perating conditions ...................................... 6 absolute maximum ratings ............................................................7 esd caution ...................................................................................7 p in configuration and function descriptions ..............................8 test conditions ..................................................................................9 applications information .............................................................. 10 functional description .............................................................. 10 startup .......................................................................................... 10 typical application diagram .................................................... 11 magnetic field immunity .......................................................... 11 outline dimensions ....................................................................... 12 ordering guide .......................................................................... 12 automotive products ................................................................. 12 revision history 7/11 rev. c to rev. d change to typical application diagram section ....................... 11 5/ 10 rev. b to rev. c changes to features section and applications section ............... 1 changed v dd1 = 5 v, a n d v dd2 = 5 v to v dd1 = 3.3 v or 5 v, and v dd2 = 3.3 v or 5 v ........................................................................... 3 changed v dd1 = 5 v, a n d v dd2 = 5 v to v dd1 = 3.3 v or 5 v, and v dd2 = 3.3 v or 5 v ........................................................................... 4 changes to typical application diagram section and figure 9 ............................................................................................ 11 changes to ordering gu ide .......................................................... 12 added automotive products section ........................................... 12 12 /0 9 rev. a to rev. b changes to features section ............................................................ 1 changes to operating temperature (t a ) parameter, table 7 ..... 6 changes to ambient operating temperature (t a ) parameter, table 8 ................................................................................................ 7 changes to ordering guide .......................................................... 12 6/07 rev. 0 to rev. a updated vde certification throughout ....................................... 1 changes to features and note 1 ...................................................... 1 changes to table 4 and table 5 ........................................................ 5 changes to table 6 ............................................................................. 6 updated outline dimensions ....................................................... 12 changes to ordering guide .......................................................... 12 10/06 revi sion 0 : initial version
ADUM1250/adum1251 rev. d | page 3 of 12 specifications electrical character istics dc specification s 1 all min imum /max imum specifications apply over the entire recommended operating range, unless otherwise noted. all typical specifications are at t a = 25c, v dd1 = 3.3 v or 5 v, and v dd2 = 3.3 v or 5 v , unl ess otherwise noted . table 1 . parameter symbol min typ max unit test conditions ADUM1250 input supply current, side 1, 5 v i dd1 2.8 5.0 ma v dd1 = 5 v input supply current, side 2, 5 v i dd2 2.7 5.0 ma v dd2 = 5 v inp ut supply current, side 1, 3.3 v i dd1 1.9 3.0 ma v dd1 = 3.3 v input supply current, side 2, 3.3 v i dd2 1.7 3.0 ma v dd2 = 3.3 v adum1251 input supply current, side 1, 5 v i dd1 2.8 6.0 ma v dd1 = 5 v input supply current, side 2, 5 v i dd2 2. 5 4.7 ma v dd2 = 5 v input supply current, side 1, 3.3 v i dd1 1.8 3.0 ma v dd1 = 3.3 v input supply current, side 2, 3.3 v i dd2 1.6 2.8 ma v dd2 = 3.3 v leakage currents i sda1 , i sda2 , i scl1 , i scl2 0.01 10 a v sda1 = v dd1 , v sda2 = v dd2 , v scl1 = v dd1 , v scl2 = v dd2 side 1 logic levels logic input threshold 2 v sda1t , v scl1 t 500 700 mv logic low output voltages v sda1ol , v scl1ol 600 900 mv i sda1 = i scl1 = 3.0 ma 600 850 mv i sda1 = i scl1 = 0.5 ma input/output logic low level difference 3 v sda1 , v scl1 50 mv side 2 logic levels logic low input voltage v sda2il , v scl2il 0.3 v dd2 v logic high input voltage v sda2ih , v scl2ih 0.7 v dd2 v logic low output voltage v sda2ol , v scl2ol 400 mv i sda2 = i scl2 = 30 ma 1 all voltages are relative to their respective ground . 2 v il < 0.5 v, v ih > 0.7 v. 3 v s1 = v s1ol C v s1t . this is the minimum difference between the output logic low level and the input logic threshold within a given component. t his ensures that there is no possibility of the part latching up the bus to which it is connected.
ADUM1250/adum1251 rev. d | page 4 of 12 ac specificatio ns 1 all min imum /max imum specifications apply over the entire recommended operating range, unless otherwise noted. all typical specifications are at t a = 25c, v dd1 = 3.3 v or 5 v, and v dd2 = 3.3 v or 5 v , unless otherwise noted. refer to figure 5 . table 2 . parameter symbol min typ max unit test conditions maximum frequency 1000 k hz output fall time 5 v operation 4.5 v v dd1 , v dd2 5.5 v, c l1 = 40 pf, r1 = 1.6 k , c l2 = 400 pf, r2 = 180 side 1 output (0.9 v dd1 to 0.9 v) t f1 13 26 120 ns side 2 output (0.9 v dd2 to 0.1 v dd2 ) t f2 32 52 120 ns 3 v operation 3.0 v v dd1 , v dd2 3.6 v, c l1 = 40 pf, r1 = 1.0 k , c l2 = 400 pf, r2 = 120 side 1 output (0.9 v dd1 to 0.9 v) t f1 13 32 120 ns side 2 output (0.9 v dd2 to 0.1 v dd2 ) t f2 32 61 120 ns propagation delay 5 v operation 4.5 v dd1 , v dd2 5.5 v, c l1 = c l2 = 0 pf , r1 = 1.6 k , r2 = 180 side 1 -to - side 2, rising edge 2 t plh12 95 130 ns side 1 -to - side 2, falling edge 3 t phl12 162 275 ns side 2 -to - side 1, rising edge 4 t plh21 31 70 ns side 2 -to - side 1, falling edge 5 t phl21 85 155 ns 3 v operation 3.0 v v dd1 , v dd2 3.6 v, c l1 = c l2 = 0 pf , r1 = 1.0 k , r2 = 120 side 1 -to - side 2, rising edge 2 t plh12 82 125 ns side 1 -to - side 2, falling edge 3 t phl12 196 340 ns side 2 -to - side 1, rising edge 4 t plh21 32 75 ns side 2 -to - side 1, falling edge 5 t phl21 110 210 ns pulse width distortion 5 v operation 4.5 v v dd1 , v dd2 5.5 v, c l1 = c l2 = 0 pf , r1 = 1.6 k, r2 = 180 side 1 -to -sid e 2, |t plh12 ? t phl12 | pwd 12 67 145 ns side 2 -to - side 1, |t plh21 ? t phl21 | pwd 21 54 85 ns 3 v operation 3.0 v v dd1 , v dd2 3.6 v, c l1 = c l2 = 0 pf , r1 = 1.0 k , r2 = 120 side 1 -to - side 2, |t plh12 ? t phl12 | pwd 12 114 215 ns side 2 -to - side 1, |t plh21 ? t phl21 | pwd 21 77 135 ns common - mode transient immunity 6 |cm h |, |cm l | 25 35 kv/s 1 all voltage s are relative to their respective ground . 2 t plh12 propagation delay is measured from the side 1 input logic threshold to an output value of 0.7 v dd2 . 3 t phl12 propagation delay is measured from the side 1 input logic threshold to an output value of 0.4 v . 4 t plh21 propagation delay is measured from the side 2 input logic threshold to an output value of 0.7 v dd1 . 5 t phl21 propagation delay is measured from the side 2 input logic threshold to an output value of 0.9 v. 6 cm h is the maximum common - mode voltag e slew rate that can be sustained while maintaining v o > 0.8 v dd2 . cm l is the maximum common - mode voltage slew rate tha t can be sustained while maintaining v o < 0.8 v. the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. the transient magnitude is the range over which the common mode is slewed.
ADUM1250/adum1251 rev. d | page 5 of 12 package characterist ics table 3. parameter symbol min typ max unit test conditions resistance (input to output) 1 r i- o 10 12 capacitance (input to output) 1 c i- o 1.0 pf f = 1 mhz input capacitance c i 4.0 pf ic junction - to - case thermal resistance, side 1 jci 46 c/w thermocouple located at center of package underside ic j unction - to - case thermal resistance, side 2 jco 41 c/w 1 the d evice is considered a 2- terminal device ; pin 1 through pin 4 are shorted together, and pin 5 through pin 8 are shorted together. regulatory informati on the adum 1250/adum1251 have be en approved by the organizations listed in table 4 . table 4. ul csa vde recognized under 1577 component recognition program 1 approved under csa component acceptance notice #5a certified according to din v vde v 0884 -10 (vde v 0884 - 10):2006- 12 2 single/ b asic 2500 v rms isolation voltage reinforced insulation per csa 60950 -1- 03 and iec 60950 -1, 125 v rms ( 177 v peak) maximum working voltage basic insulation per csa 60950 -1- 03 and iec 60950 -1, 400 v rms (566 v peak ) maximum working voltage reinforced insulation, 560 v peak file e214100 file 205078 file 2471900 - 4880 - 0001 1 in accordance with ul 1577, each adum125x is proof tested by applying an insulation test voltage 3000 v rms for 1 second (current leakage detection limit = 5 a) . 2 in accordance with din v vde v 0884 - 10 , each adum125x is proof tested by applying an insulation test voltage 1050 v peak for 1 second (partial discharge detection limit = 5 pc). the * marking branded on the component designates din v vde v 0884 - 10 approval. insulation and safe ty - related specificatio ns table 5. parameter symbol value unit conditions rated dielectric insulation voltage 2500 v rms 1- minute duration minimum external air gap (clearance) l(i01) 4.90 min mm measured from input te rminals to output terminals, shortest distance through air minimum external tracking (creepage) l(i02) 4.01 min mm measured from input terminals to output terminals, shortest distance path along body minimum internal gap (internal clearance) 0.017 min mm insulation distance through insulation tracking resistance (comparative tracking index) cti >175 v din iec 112/vde 0303 part 1 isolation group iiia material group (din vde 0110, 1/89, table 1) maximum working voltage compatible with 5 0 years service life v iorm 565 v peak continuous peak voltage across the isolation barrier
ADUM1250/adum1251 rev. d | page 6 of 12 din v vde v 0884 - 10 (vde v 0884 - 10) insulation character istics this isolator is suitable for reinforced isolation only within the safety limit data. maintenance of the safety data is ensured by protective circuits. the * marking on the package denotes din v vde v 0884 - 10 approval for a 560 v peak working voltage. table 6. description conditions symbol characteristic unit installation classif ication per din vde 0110 for rated mains voltage 150 v rms i to iv for rated mains voltage 300 v rms i to iii for rated mains voltage 400 v rms i to ii climatic classification 40/105/21 pollution degree per din vde 0110, table 1 2 maximum working insulation voltage v iorm 560 v peak input - to - output test voltage, method b1 v iorm 1.875 = v pr , 100% production test, t m = 1 sec, partial discharge < 5 pc v pr 1050 v peak input - to - output test voltage, method a v iorm 1.6 = v pr , t m = 60 sec, partial discharge < 5 pc v pr after e nvironmental tests subgroup 1 896 v peak after input and/or safety test subgroup 2 and subgroup 3 v iorm 1.2 = v pr , t m = 60 sec, partial discharge < 5 pc 672 v peak highest allowable overvoltage transient overvoltage, t tr = 10 seconds v tr 4000 v pea k safety - limiting values maximum value allowed in the event of a failure ( see figure 3 ) case temperature t s 150 c v dd1 + v dd2 current i tmax 212 ma insulation resistance at t s v io = 500 v r s >10 9 case temperature (c) safety-limiting current (ma) 0 0 350 50 100 150 200 50 300 150 100 200 250 06113-003 figure 3 . thermal derating curve, dependence of safety - limiting values on case temperature, per din v vde v 0884 - 10 recommended operating conditions table 7. parameter rating operating temperature (t a ) a grade ?40c to +105c s grade ?40c to +1 2 5c supply voltages (v dd1 , v dd2 ) 1 3.0 v to 5.5 v input/output signal voltage (v sda1 , v scl1 , v sda2 , v scl2 ) 5.5 v capacitive load side 1 (c l1 ) 40 pf side 2 (c l2 ) 400 pf static output loading side 1 (i sda1 , i scl1 ) 0.5 m a to 3 ma side 2 (i sda2 , i scl2 ) 0.5 ma to 30 ma 1 all voltages are relative to their respective ground. see the application s informati on section for data on immunity to external magnetic fields.
ADUM1250/adum1251 rev. d | page 7 of 12 absolute maximum rat ings ambient temperature = 25c, unless otherwise noted. table 8. parameter rating storage temperature (t st ) ?55c to +150c ambient operating temperature (t a ) a grade ?40c to+105c s grade ?40c to+1 2 5c supply voltages (v dd1 ,v dd2 ) 1 ?0.5 v to +7.0 v input/output voltage, side 1 (v sda1 , v scl1 ) 1 ?0.5 v to v dd1 + 0.5 v side 2 (v sda2 , v scl2 ) 1 ?0.5 v to v dd2 + 0.5 v average output current per pin 2 side 1 (i o1 ) 18 ma side 2 (i o2 ) 100 ma common - mode transients 3 ?100 kv/s to +100 kv/s 1 all voltages are relative to their respective ground. 2 see figure 3 for maximum rated current valu es for various temperatures. 3 refers to common - mode transients across the insulation barrier. common - mode transients exceeding the absolute maximum rating may cause latch - up or permanent damage . stresses above those listed under absolute maximum ratings may cause permanent damage to the dev ice. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended period s may affect device reliability. esd caution
ADUM1250/adum1251 rev. d | page 8 of 12 pin configuration and function descripti ons v dd1 1 sda 1 2 scl 1 3 gnd 1 4 v dd2 8 sda 2 7 scl 2 6 gnd 2 5 ADUM1250/ adum1251 top view (not to scale) 06113-004 figure 4 . ADUM1250/adum1251 pin configuration table 9 . ADUM1250 pin function descriptions pin no. mnemo nic descrip tion 1 v dd1 supply v oltage, 3.0 v to 5.5 v. 2 sda 1 data input/output, side 1. 3 scl 1 clock input/output, side 1. 4 gnd 1 ground 1. ground reference for i solator side 1. 5 gnd 2 ground 2. isolated ground reference for i solator side 2. 6 scl 2 clock input/output, side 2. 7 sda 2 data input/output, side 2. 8 v dd2 supply v oltage, 3.0 v to 5.5 v. table 10 . adum1251 pin function descriptions pin no. mnemonic descrip tion 1 v dd1 supply v oltage, 3.0 v to 5 .5 v. 2 sda 1 data input/output, side 1. 3 scl 1 clock input, side 1. 4 gnd 1 ground 1. ground reference for i solator side 1. 5 gnd 2 ground 2. isolated ground reference for i solator side 2. 6 scl 2 clock output, side 2. 7 sda 2 data input/output , side 2. 8 v dd2 supply v oltage, 3.0 v to 5.5 v.
ADUM1250/adum1251 rev. d | page 9 of 12 test conditions encode decode decode encode encode decode decode encode v dd1 sda 1 scl 1 v dd2 sda 2 scl 2 c l2 gnd 2 1 2 3 8 7 6 5 gnd 1 4 c l2 r2 r2 c l1 c l1 r1 r1 06113-005 figure 5 . timing test diagram
ADUM1250/adum1251 rev. d | page 10 of 12 applications information functi onal d escription the ADUM1250/adum1251 interfaces on each side to a bidirectional i 2 c signal. in ternally, the i 2 c interface is split into two unidirectional channels communicating in opposing directions via a dedicated i coupler isolation channel for each. one channel (the bottom channel of each channel pair shown in figure 6 ) senses the voltage state of the side 1 i 2 c pin and transmits its state to its respective side 2 i 2 c pin . both the side 1 and the side 2 i 2 c pins are designed to interface to a n i 2 c bus operating in the 3.0 v to 5.5 v range. a logic low on either causes the opposite pin to be pulled low enough to comply with the logic low threshold requirements of other i 2 c devices on the bus. avoidance of i 2 c bus contention is ensured by an input low threshold at sda 1 or scl 1 guaranteed to be at least 50 mv less than the output low signal at the same pin. this prevents an output logic low at side 1 being transmitted back to side 2 and pulling down the i 2 c bus. since the side 2 logic levels/thresholds are standard i 2 c values, multiple ADUM1250/adum1251 devices connected to a bus by their side 2 pins can communicate with each other and with other devices having i 2 c compatibility. a distinction is made between i 2 c compatibility and i 2 c compliance. i 2 c compatibility refers to situations in which a component's logic levels do n ot necessarily meet the requirements of the i 2 c specification but still allow the component to communication with an i 2 c- compliant device. i 2 c compliance refers to situations in which a component's logic levels meet the requirements of the i 2 c specificatio n. however, since the side 1 pin has a modified output level/input threshold, this side of the ADUM1250/adum1251 can only communicate with devices conforming to the i 2 c standard. in other words, side 2 of the ADUM1250/adum1251 is i 2 c- compliant , while side 1 is only i 2 c- compatible. the output logic low levels are independent of the v dd1 and v dd2 voltages. the input logic low threshold at side 1 is also independent of v dd1 . however, the input logic low threshold at side 2 is design ed to be at 0.3 v dd2 , consis tent with i 2 c require - ments. the side 1 and side 2 pins have open - collector outputs whose high levels are set via pull- up resistors to their respective supply voltages. encode decode decode encode encode decode decode encode v dd1 sda 1 scl 1 v dd2 sda 2 scl 2 c l gnd 2 1 2 3 8 7 6 5 gnd 1 4 c l r2 r2 06113-006 figure 6 . ADUM1250 block diagram startup both the v dd1 an d v dd2 supplies have an under volt age lockout feature to prevent the signal channels from operating unless certain criteria are met. this avoid s the possibility of input logic low signals from pulling down the i 2 c bus inadvertently during power - up/power - dow n. the two criteria that must be met in order for the signal channels to be enabled are as follows: ? both supplies must be at least 2.5 v. ? at least 40 s must elapse after both supplies exceed the internal startup threshold of 2.0 v. until both of these cri teria are met for both supplies, the ADUM1250/ adum 1251 outputs are pulled high , ensuring a startup that avoid s any disturbances on the bus. figure 7 and figure 8 illustrate the supply conditions for fast and slow input supply slew rates. minimum recommended operating supply, 3.0v minimum valid supply, 2.5v internal startup threshold, 2.0v 40s supply valid 06113-007 figure 7. start- up condition, supply s lew rate > 1 2.5 v/ms 40s supply valid min. recommended operating supply, 3.0v min. valid supply, 2.5v internal startup threshold, 2.0v 06113-008 figure 8. start-u p condition, s upply s lew rate < 12.5 v/ms
ADUM1250/adum1251 rev. d | page 11 of 12 typical application diagram v dd1 gnd 1 sda 1 gnd 2 v dd2 sda 2 ADUM1250 scl 1 scl 2 i 2 c bus 1 2 3 4 8 7 6 5 06113-009 optional 200 ? figure 9. typical isolated i 2 c interface using ADUM1250 figure 9 shows a typical application circuit including the pull-up resistors required for both side 1 and side 2 busses. bypass capacitors of between 0.1 f and 0.01 f are required between v dd1 to gnd 1 and v dd2 to gnd 2 . the 200 resistor shown in figure 9 is required for latch-up immunity if the ambient temperature can be between 105c and 125c. magnetic field immunity the adum125x is extremely immune to external magnetic fields. the limitation on the adum125x magnetic field immunity is set by the condition in which induced voltage in the transformers receiving coil is sufficiently large to either falsely set or reset the decoder. the following analysis defines the conditions under which this may occur. the 3 v operating condition of the adum125x is examined because it represents the most susceptible mode of operation. the pulses at the transformer output have an amplitude greater than 1.0 v. the decoder has a sensing threshold at about 0.5 v, thus establishing a 0.5 v margin in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by ? ?? ?? nnrdt d v n ...,2,1;)/( 2 where: is the magnetic flux density (gauss). n is the number of turns in the receiving coil. r n is the radius of the nth turn in the receiving coil (cm). given the geometry of the receiving coil in the ADUM1250 and an imposed requirement that the induced voltage is at most 50% of the 0.5 v margin at the decoder, a maximum allowable magnetic field is calculated, as shown in figure 10. magnetic field frequency (hz) 100 maximum allowable magnetic flux density (kgauss) 0.001 1m 10 0.01 1k 10k 10m 0.1 1 100m 100k 0 6113-010 figure 10. maximum allowable external magnetic flux density for example, at a magnetic field frequency of 1 mhz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 v at the receiving coil. this is about 50% of the sensing threshold and does not cause a faulty output transition. similarly, if such an event occurs during a transmitted pulse (with the worst-case polarity), it reduces the received pulse from >1.0 v to 0.75 v. note that this is still well above the 0.5 v sensing threshold of the decoder. the preceding magnetic flux density values correspond to specific current magnitudes at given distances away from the adum125x transformers. figure 11 expresses these allowable current magnitudes as a function of frequency for selected distances. as shown in figure 11, the adum125x is extremely immune and can be affected only by extremely large currents operated at high frequency and very close to the component. for the 1 mhz example, one would have to place a 0.5 ka current 5 mm away from the adum125x to affect the components operation. magnetic field frequency (hz) maximum allowable current (ka) 1000 100 10 1 0.1 0.01 1k 10k 100m 100k 1m 10m distance = 5mm distance = 1m distance = 100mm 06113-011 figure 11. maximum allowable current for various current-to-adum125x spacings note that at combinations of strong magnetic fields and high frequencies, any loops formed by printed circuit board traces can induce sufficiently large error voltages to trigger the threshold of succeeding circuitry. care should be taken in the layout of such traces to avoid this possibility.
ADUM1250/adum1251 rev. d | page 12 of 12 outline dimensions controlling dimensio ns a re in millimeters; inch dimensions (in parent heses) a re rounded-off millimeter equivalents fo r r eference only and are not appropriate for use in d esign. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 8 5 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 12 . 8 - lead standard small outline package [soic _n ] narrow body (r- 8) dimensions shown in millimeters (inches) ordering g uide model 1 , 2 number of inputs, v dd1 side number of inputs, v dd2 side maximum data rate (mbps) maximum propagation delay (ns) temperature rang e package description package option ADUM1250arz 2 2 1 150 ?40 c to +105c 8- lead soic_n r-8 ADUM1250arz -r l7 2 2 1 150 ?40c to +105c 8- lead soic_n r-8 ADUM1250 srz 2 2 1 150 ?40 c to +12 5c 8- lead soic_n r-8 ADUM1250 srz - rl7 2 2 1 150 ?40c to +1 2 5c 8- lead soic_n r-8 ADUM1250wsrz 2 2 1 150 ?40 c to +12 5c 8- lead soic_n r-8 ADUM1250 wsrz - rl7 2 2 1 15 0 ?40c to +1 2 5c 8- lead soic_n r-8 adum1251arz 2 1 1 150 ?40c to +105c 8- lead soic_n r-8 adum1251arz - rl7 2 1 1 150 ?40c to +105c 8- lead soic_n r-8 1 z = rohs compliant part. 2 w = qualified for automotive applications. automotive products the ADUM1250 w models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. note that these automotive models may have specifications that differ from the commercial models; therefore, de signers should review the specifications section of this data sheet carefully . only the automotive grade products shown are available for use in automotive applications. contact your local analog devices account representative for specific product ordering information a nd to obtain the specific automotive reliability reports for th ese models. i 2 c refers to a communications protocol originally developed by philips semiconductors (now nxp semiconductors) . ? 2006 C 2011 analog devices, inc. all rights reserved. trademark s and registered trademarks are the property of their respective owners. d06113 -0- 7/11(d)

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